224 English-speaking jobs in Community of Valencia

Security Operations Analyst focused on SIEM operations and threat detection within a CSOC. Responsibilities include enhancing detection capabilities, managing security content, and optimizing monitoring across SIEM, EDR, and cloud environments. Requires 5+ years of IT experience.

Security Operations Analyst focused on SIEM operations and threat detection within a CSOC. Responsibilities include enhancing detection capabilities, managing security content, and optimizing monitoring across SIEM, EDR, and cloud environments. Requires 5+ years of IT experience.

Define and lead the global strategy and operating model for Sonova's repair network. This role drives operational excellence, standardization, and digitalization across refurbishment and reverse logistics. Requires 10+ years of leadership experience.

Lead the global quality framework for NPI, aligning design-to-production transitions with customer requirements. Own QMS deployment, DFx reviews, and launch readiness across HealthTech sites to ensure regulatory compliance.

Lead test automation solutions within QSS Test Operations, integrating and supporting CI/CD pipelines and test infrastructure. Responsibilities include defining requirements, managing implementations, and administering Linux environments. Requires 3-5 years of testing experience and a relevant engineering degree.

Lead test automation solutions and manage stakeholder relationships within QSS Test Operations. Integrate and support test automation infrastructure and CI systems. Requires 3-5 years in software testing with project management experience and a relevant Master's degree.

About the jobResponsibilities1. Serve as a primary point of contact for sellers, addressing issues related to registration,compliance, listing support, and account management promptly and professionallybased on the guidance of global teams. 2.

Chef Tournant role requires 5+ years in upscale service with 2+ as Chef Tournant. Direct, coach, and supervise kitchen teams across all sections, ensuring recipe quality, production control, and strict adherence to public health and HACCP standards.

Drive end-to-end physical implementation and signoff of digital blocks and SoCs. Apply RTL-to-GDSII expertise to manage timing, power, and layout challenges using Cadence or Synopsys flows. Requires 3–7 years of relevant physical design experience.

Senior Physical Design Engineer drives end-to-end physical implementation and signoff of digital blocks and SoCs. Responsibilities include floor-planning, CTS, routing, and timing closure using Cadence or Synopsys flows. Requires 3–7 years of relevant experience.

Senior Design Engineer to develop logic IPs (standard cells and IOs) for analog, digital, and mixed-signal SOC designs. Requires 3+ years experience, Master's in Electrical Engineering, and strong knowledge of circuit design and library view development.

Senior technical leader for end-to-end physical implementation and signoff of complex SoCs across advanced nodes. Responsibilities include RTL-to-GDSII, timing closure, and leading distributed design teams. Requires 10+ years of experience.

Senior technical leader for end-to-end physical implementation and signoff of complex SoCs across advanced nodes. Responsibilities include RTL-to-GDSII, timing closure, and leading distributed design teams. Requires 10+ years of experience.

Drive end-to-end physical implementation and signoff of digital blocks and SoCs. Apply RTL-to-GDSII expertise to manage timing, power, and layout challenges using Cadence or Synopsys flows. Requires 3–7 years of relevant physical design experience.

Principal Physical Design Engineer leads end-to-end physical implementation and signoff of complex SoCs on advanced nodes. Responsibilities include driving timing closure, optimizing PPA, and leading distributed PD teams using Cadence/Synopsys flows. Requires 10+ years of experience.

Drive end-to-end physical implementation and signoff of digital blocks and SoCs. Apply RTL-to-GDSII expertise to tackle timing, power, and layout challenges using Cadence or Synopsys flows. Requires 3–7 years of relevant physical design experience.

Senior technical leader for end-to-end physical implementation and signoff of complex SoCs across advanced nodes. Responsibilities include RTL-to-GDSII, timing closure, and leading distributed Physical Design teams. Requires 10+ years of experience.

Senior Physical Design Engineer supports end-to-end physical implementation and signoff of digital blocks and SoCs. Responsibilities include floor-planning, CTS, routing, and timing closure using Cadence or Synopsys tools. Requires 3-7 years of relevant experience.

COREX is a global team of professionals driven by a shared mission: improving patient health, because behind every project is a life that matters. Headquartered in Dublin, our team works from all corners of the world, staying seamlessly connected through our digital office.

Medior Backend Software Engineer to join the development team, contributing to the full product lifecycle. Work on cloud-based applications using Java Spring Boot in a microservices ecosystem, building RESTful APIs and Kafka integrations.